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Revision as of 15:31, 12 May 2010 by Idwer (talk | contribs)
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Done are:

  • Dr. Kaiser PC-Wächter flashing support (the FPGA variant)
  • Blockwise erase (infrastructure and a few chips, no user interface yet)
  • split frontend and backend functionality
  • DOS support
  • bitbanging SPI driver infrastructure
  • Bus Pirate support
  • Dediprog SF100 support

Countless new features and bugfixes like:

  • cosmetic and naming/coding style fixes
  • error checking/handling
  • dependency checking/handling
  • Add infrastructure to check and report to the user the maximum supported decode size for chipsets and tested mainboards
  • new message infrastructure
  • Matching board via DMI
  • print runtime and build environment information

Possibly planned (if someone has the time to actually implement them) are:

  • Windows support
  • Various small fixes
  • Partial read support
  • Partial erase support
  • Partial write support
  • Nvidia graphics card (r737, which generations: RIVA, GeForce2/3 and several more; http://www.flashrom.org/trac/flashrom/browser/trunk/gfxnvidia.c#L30) as external flasher
  • Intel E100/E1000 network cards as external parallel/SPI flasher
  • libflashrom so we can use the backend in
    • payloads
    • GUI applications
  • Artec Group LPC Dongle support

If you know of features or pending patches which are not in the list, please mail Carl-Daniel.